Recent studies show that increasing numbers of design bugs are escaping to post-silicon due to the complexity of advanced designs and the lack of adequate verification tools that can validate complex electrical interactions between electrical …
In production testing of analog/RF ICs, application of standard specification-based tests for IC classification is not always an attractive option due to the high costs and test times involved. In this paper, a new test generation algorithm for IC …
In the recent past, Physically Unclonable Functions (PUFs) have been proposed as a way of implementing security in modern ICs. PUFs are hardware designs that exploit the randomness in silicon manufacturing processes to create IC-specific signatures …
Prior research has established that dynamically trading-off the performance of the RF front-end for reduced power consumption across changing channel conditions, using a feedback control system that modulates circuit and algorithmic level "tuning …
As RF design scales to the 28nm technology node and beyond, pre-silicon simulation and verification of complex mixed-signal/RF SoCs is becoming intractable due to the difficulties associated with simulating diverse electrical effects and design bugs. …
Insertion of malicious Trojans into outsourced chip manufacturing generally results in increased capacitances of internal circuit nodes that have been tapped for node controllability and observability by malicious circuitry. Current path delay …
With trends in mixed-signal systems-on-chip indicating increasingly extreme scaling of device dimensions and higher levels of integration, the tasks of both design and device validation is becoming increasingly complex. Post-silicon validation of …
Post-silicon validation of RF/mixed-signal circuits is challenging due to the need to excite all possible operational modes of the DUT in order to establish equivalence between its specified and observed behaviors and to ensure that the DUT does not …
Due to the use of scaled technologies, high levels of integration and high speeds of today's mixed-signal SoCs, the problem of validating correct operation of the SoC under electrical bugs and that of debugging yield loss due to unmodeled …