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Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery

High operating speeds and use of aggressive fabrica- tion technologies necessitate validation of mixed-signal electronic systems at every stage of top-down design: behavioral to netlist to physical design to silicon. At each step, design validation …

BISCC: Efficient Pre through Post Silicon Validation of Mixed-Signal/RF Systems Using b Uilt Ins Tate c Onsistency c Hecking

Concurrent Built in Test and Tuning of Beamforming MIMO Systems Using Learning Assisted Performance Optimization

Design of Efficient Analog Physically Unclonable Functions Using Alternative Test Principles

Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits

We present a methodology for algorithmic generation of test signals for thedetection and diagnosis of a variety of short and open-circuit defects in analogcircuits. Prior algorithms have focused on test generation for known short oropen defect …

DE-LOC: Design Validation and Debugging under Limited Observation and Control, Pre- and Post-Silicon for Mixed-Signal Systems

In the modern mixed-signal SoC design cycle, designers are frequently tasked with detecting and diagnosing behavioral discrepancies between design descriptions given at different levels of hierarchy, e.g. behavioral vs. transistor level descriptions …

Post Silicon Validation of Analog/Mixed Signal/RF Circuits and Systems: Recent Advances

Technology scaling along with unprecedented levels of device integration has led to increasing numbers of analog/mixed-signal/RF design bugs escaping into silicon. Such bugs are manifested under specific system-on-chip (SoC) operating conditions and …

Targeting Hardware Trojans in Mixed-Signal Circuits for Security

The proliferation of third-party silicon manufacturing has increased the vulnerability of integrated circuits to malicious insertion of hardware for the purpose of leaking secret information or even rendering the circuits useless while deployed in …

Adaptive Testing of Analog/RF Circuits Using Hardware Extracted FSM Models

The test generation problem for analog/RF circuits has been largely intractable due to the fact that repetitive circuit simulation for test stimulus optimization is extremely time-consuming. As a consequence, it is difficult, if not impossible, to …

Trojan Detection in Digital Systems Using Current Sensing of Pulse Propagation in Logic Gates

Outsourcing of chip manufacturing to untrusted foundries and using third party IPs in design, have opened the possibility of inserting malicious hardware Trojans into the circuit. As excitation of Trojan is extremely rare, it is almost impossible to …