Publications

Barry Muldrey (2019). Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery. Proceedings IEEE VLSI Test Symposium.

Sabyasachi Deyati, Barry Muldrey, Adit Singh, Abhijit Chatterjee (2017). Design of Efficient Analog Physically Unclonable Functions Using Alternative Test Principles. 2017 International Mixed Signals Testing Workshop (IMSTW).

Sabyasachi Deyati, Barry J. Muldrey, Byunghoo Jung, Abhijit Chatterjee (2017). Concurrent Built in Test and Tuning of Beamforming MIMO Systems Using Learning Assisted Performance Optimization. 2017 IEEE International Test Conference (ITC).

Sabyasachi Deyati, Barry Muldrey, Abhijit Chatterjee (2017). BISCC: Efficient Pre through Post Silicon Validation of Mixed-Signal/RF Systems Using b Uilt Ins Tate c Onsistency c Hecking. Proceedings of the Conference on Design, Automation & Test in Europe.

B. Muldrey, S. Deyati, A. Chatterjee (2016). DE-LOC: Design Validation and Debugging under Limited Observation and Control, Pre- and Post-Silicon for Mixed-Signal Systems. 2016 IEEE International Test Conference (ITC).

B. Muldrey, S. Deyati, A. Chatterjee (2016). Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits. 2016 IEEE 25th Asian Test Symposium (ATS).

S. Deyati, B. J. Muldrey, A. Chatterjee (2016). Targeting Hardware Trojans in Mixed-Signal Circuits for Security. 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

A. Chatterjee, S. Deyati, B. J. Muldrey (2016). Post Silicon Validation of Analog/Mixed Signal/RF Circuits and Systems: Recent Advances. 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

S. Deyati, B. J. Muldrey, A. Chatterjee (2016). Adaptive Testing of Analog/RF Circuits Using Hardware Extracted FSM Models. 2016 IEEE 34th VLSI Test Symposium (VTS).

S. Deyati, B. J. Muldrey, A. Chatterjee (2016). Trojan Detection in Digital Systems Using Current Sensing of Pulse Propagation in Logic Gates. 2016 17th International Symposium on Quality Electronic Design (ISQED).

S. Deyati, B. J. Muldrey, A. Chatterjee (2016). TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm. 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

Debashis Banerjee, Barry Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee (2016). Self-Learning RF Receiver Systems: Process-Aware Real-Time Adaptation to Channel Conditions for Low Power Operation.

Barry Muldrey, Sabyasachi Deyati, Abhijit Chatterjee (2016). Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities Via Iterative Learning Experiments on Hardware.

Nicholas L. Tzou, Debesh Bhatta, Xian Wang, Te-Hui Chen, Sen-Wen Hsiao, Barry Muldrey, Hyun Woo Choi, Abhijit Chatterjee (2016). Concurrent Multi-Channel Crosstalk Jitter Characterization Using Coprime Period Channel Stimulus.

S. Deyati, B. J. Muldrey, A. D. Singh, A. Chatterjee (2015). Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security. 2015 IEEE 24th Asian Test Symposium (ATS).

Nicholas Tzou, Debesh Bhatta, Barry J. Muldrey, Thomas Moon, Xian Wang, Hyun Choi, Abhijit Chatterjee (2015). Low Cost Sparse Multiband Signal Characterization Using Asynchronous Multi-Rate Sampling: Algorithms and Hardware.

D. Banerjee, B. Muldrey, S. Sen, X. Wang, A. Chatterjee (2014). Self-Learning MIMO-RF Receiver Systems: Process Resilient Real-Time Adaptation to Channel Conditions for Low Power Operation. 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

S. Deyati, B. J. Muldrey, A. Banerjee, A. Chatterjee (2014). Atomic Model Learning: A Machine Learning Paradigm for Post Silicon Debug of RF/Analog Circuits. 2014 IEEE 32nd VLSI Test Symposium (VTS).

Sabyasachi Deyati, Barry John Muldrey, Adit Singh, Abhijit Chatterjee (2014). High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure. Test Symposium (ATS), 2014 IEEE 23rd Asian.

B. Muldrey, S. Deyati, M. Giardino, A. Chatterjee (2013). RAVAGE: Post-Silicon Validation of Mixed Signal Systems Using Genetic Stimulus Evolution and Model Tuning. VLSI Test Symposium (VTS), 2013 IEEE 31st.

S. Deyati, A. Banerjee, B. J. Muldrey, A. Chatterjee (2013). VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests. 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

A. Chatterjee, S. Deyati, B. Muldrey, S. Devarakond, A. Banerjee (2012). Validation Signature Testing: A Methodology for Post-Silicon Validation of Analog/Mixed-Signal Circuits. ACM.

Dimitrios Charalampidis, Barry Muldrey (2009). Clustering Using Multilayer Perceptrons.