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A. Chatterjee

Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits
DE-LOC: Design Validation and Debugging under Limited Observation and Control, Pre- and Post-Silicon for Mixed-Signal Systems
Post Silicon Validation of Analog/Mixed Signal/RF Circuits and Systems: Recent Advances
Targeting Hardware Trojans in Mixed-Signal Circuits for Security
Adaptive Testing of Analog/RF Circuits Using Hardware Extracted FSM Models
Trojan Detection in Digital Systems Using Current Sensing of Pulse Propagation in Logic Gates
TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm
Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security
Self-Learning MIMO-RF Receiver Systems: Process Resilient Real-Time Adaptation to Channel Conditions for Low Power Operation
Atomic Model Learning: A Machine Learning Paradigm for Post Silicon Debug of RF/Analog Circuits
RAVAGE: Post-Silicon Validation of Mixed Signal Systems Using Genetic Stimulus Evolution and Model Tuning
VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests
Validation Signature Testing: A Methodology for Post-Silicon Validation of Analog/Mixed-Signal Circuits

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